1. Field of the Invention
This invention relates to computer systems and more particularly to mechanisms and techniques for supporting an interrupt driven system management mode.
2. Description of the Relevant Art
The heart of a computer system is the microprocessor. As microprocessors have evolved over recent years, they have been designed to support an increasing number of functions, such as multitasking, special graphics processing, enhanced math functions, and power management.
Enhancements in the capabilities of microprocessors have permitted software programmers to generate more sophisticated software programs and have allowed efficient and versatile control of the execution of software programs. However, as the sophistication and complexity of software has increased, it has become more difficult to design software code free from defects or "bugs." The ability to debug software efficiently is a desirable step in the development of a software product.
Many computer systems have therefore been configured with mechanisms which allow software programmers to debug software. For example, microprocessors such as the particularly popular model 80486 microprocessor are designed with features which allow the software programmer to interrogate, analyze and control the microprocessor while it is executing software code. One such feature typically supported within model 80486-based systems is known as in-circuit emulation mode or ICE mode.
FIG. 1 is a block diagram illustrating a typical computer system 100 that supports in-circuit emulation mode. The computer system 100 includes a memory control unit (MCU) 102 coupled to a microprocessor (CPU) 104 and to a random access memory unit 106.
The in-circuit emulation mode of computer system 100 may be initiated while the microprocessor 104 is operating in a normal mode (during which software code is executed out of normal memory space). The in-circuit emulation mode is initiated by microprocessor 104 in response to an ICE interrupt signal at line 108. As will be appreciated by those of skill in the art, the ICE interrupt signal may be asserted by an external source (not shown). Upon assertion of the ICE interrupt signal, the microprocessor 104 transitions to an in-circuit emulation (ICE) mode and begins processing what is referred to as ICE code. During the ICE mode, microprocessor 104 asserts an ICE address strobe (ICEADS) during memory accesses rather than the normal address strobe signal ADS. It is noted that this allows, if desired, the ICE code to be stored within a bank of memory which is completely separated from the normal memory space. For the embodiment shown, the starting memory location 110 of the ICE code is pointed to by an ICE vector which is stored at a predetermined memory location 112 of memory unit 106. In response to assertion of the ICE interrupt signal, the microprocessor 104 reads the ICE vector and jumps to the memory location indicated by the ICE vector. At this point, the microprocessor 104 begins executing the ICE code. An initial portion of the instructions comprising the ICE code causes the microprocessor 104 to store the current state of various registers, flags and other parameters collectively referred to as "state information" associated with the microprocessor 104. By saving this state information, the user may subsequently inspect the memory locations into which the state information was saved and thereby determine the internal status of the microprocessor when the ICE interrupt was asserted. The ICE code may be tailored by the system programmer to support a variety of interrogation functions. Such interrogation functions can greatly aid the programmer in debugging software by allowing, for example, the programmer to single-step the code and examine the state of the various registers and memory space. The last instruction of the ICE code is typically a Return instruction that causes the microprocessor to return back to the state it was in when the ICE interrupt was initially asserted. The saved state information allows the microprocessor 104 to return to normal operation at the conclusion of the ICE procedure since the state information can be restored within the various CPU registers and flag locations where it originally resided. The state information is restored just prior to execution of the Return instruction. Upon execution of the Return instruction microprocessor reverts back to the state it was in when the ICE interrupt was initially asserted.
The ICE interrupt is also frequently utilized within computer systems to perform routine system management functions such as power management. A programmer may store system management code within the ICE memory space of the computer system to attain efficient processing of system management functions. However, the use of ICE interrupts for system management functions has led to difficulties in designing system management software code since the in-circuit emulation mode cannot be entered while the system management code is executing. This has presented a particular problem within computer systems that employ relatively complex system management software. A further problem is that system management software is often vulnerable to inadvertent or careless modification, thus leading to improper system management.